Computer networks allow multiple processors to communicate with each other. A computer network may link various types of computers and memory devices. Data is typically transferred between components on a network in packets. Packets are usually groups of data words each of a certain length. As networks become larger and more complex, it becomes increasingly important to be able to route and store packets efficiently. Packets are often temporarily stored during the process of routing from one network component to another network component. This is partially due to the random nature of the input and output port traffic distribution, as well as rate adaptation between ports that transfer data at different rates. Thus, packet storage, or buffering, is an integral part of the switching function. Buffering may occur in a memory that is part of a switch circuit (on the same die as the switch circuit) or on a memory that is separate from the switch circuit. A buffer memory may be associated with one port or shared between several ports.
When data packets are stored during routing it is important to provide fast and efficient access to the storage device, or memory, so that memory access does not become a source of delay and, therefore, of network performance degradation.
Network switches are devices that handle routing and storage of packets between network components. Network switches include input ports and output ports for connection to multiple network components transmitting data to and receiving data from the switch. The network components using the switch are known as clients of the switch. A single switch may use a single memory device to store data from multiple clients that transmit data at different rates. It is important for a network switch to handle memory access by multiple clients of different data rate capabilities in such a way as to maximize memory bandwidth. The need to maximize memory bandwidth, however, must compete with other concerns when a network switch architecture is designed. For example, providing a wider data path from clients to the buffer memory would improve memory bandwidth, but only at the cost of extra hardware and additional interconnect. Trade-offs, therefore, must be made in designing a switch architecture so that it functions both efficiently and economically.